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National Repository of Grey Literature 2 records found  Search took 0.00 seconds. 
Optimization of integrated circuits large-area delayering process using advanced inspection technologies
 Vlach, Marek ; Otáhal, Alexandr (referee) ; Chmela, Ondřej (advisor)
This bachelor thesis provides an overview of the technological methods used for decapsulation and delayering of integrated circuits. Furthermore, the inspection techniques and material analysis used during delayering of semiconductor chips are presented. The thesis also discusses the technological development of integrated circuits in terms of the transistor structures used. In the practical part of the thesis, a procedure for decapsulation and large-area delayering of integrated circuits is proposed and tested.
Detailed record
Optimization of integrated circuits large-area delayering process using advanced inspection technologies
 Vlach, Marek ; Otáhal, Alexandr (referee) ; Chmela, Ondřej (advisor)
This bachelor thesis provides an overview of the technological methods used for decapsulation and delayering of integrated circuits. Furthermore, the inspection techniques and material analysis used during delayering of semiconductor chips are presented. The thesis also discusses the technological development of integrated circuits in terms of the transistor structures used. In the practical part of the thesis, a procedure for decapsulation and large-area delayering of integrated circuits is proposed and tested.
Detailed record

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